-- ejercicio 1 practico 2 utilizando WITH
-- Implementar un multiplexor de 4 entradas

library IEEE;
use ieee.std_logic_1164.all;

entity pract2_with is
port (A, B, C, D: in std_logic;
      SEL: in std_logic_vector (1 downto 0);
	  Y: out std_logic);
end pract2_with;

architecture ej1 of pract2_with is
begin
with SEL select
	Y <= A when "00",
		 B when "01",
		 C when "10",
		 D when "11";
end ej1;